FT-UNSHADES2: A Platform for early luation of ASIC and FPGA dependability using partial reconfiguration

t—Fault injection is a widely accepted for the evaluation of device and system ty, by mean of dynamic analysis of a digital mplemented in a FPGA. A set of test vectors ed and output vectors are monitored while a of faults are injected deliberately. The fault n strategy in our platform consists of a ed modification of the FPGA’s configuration affecting the targeted netlist nodes. The data sequence is checked cycle by cycle to ny upset in it. In the new FTUNSHADES2 , the partial reconfiguration capability in Xilinx FPGAs is exploited to speed-up the cess of fault injection. The platform is not igned for fault injection in a traditional way, o to evaluate the dependability on digital intended to run on FPGAs and as a testbed m experiments on different devices. We are cing an original architecture with a software e able to manage all the operation modes, ng the capabilities of the existing platforms. rds—Single Event Effect, Partial guration, Prototyping Platform, Fault ce.